跨接在两个网络间的语音记录仪设计

资讯 2024-07-04 阅读:556 评论:0
  摘  要: 设计了语音记录仪。该语音记录仪桥接在通信设备之间,同时提供3种桥接接口:以太网接口,支持在IP通信方式下的各通话组的直通及录音功能;二线接口,支持模拟二线方式下的直通及录音功能;音...

  摘  要: 设计了语音记录仪。该语音记录仪桥接在通信设备之间,同时提供3种桥接接口:以太网接口,支持在IP通信方式下的各通话组的直通及录音功能;二线接口,支持模拟二线方式下的直通及录音功能;音频接口,支持模拟音频方式下的直通及录音功能。同时话音记录仪提供FTP服务器,可以通过局域网对语音记录仪保存的语音文件进行下载和管理。此外,该设备支持语音回放功能。

extracts & nbsp; to : The voice recorder is designed. The voice recorder bridge connects to the communications device and provides three bridging interfaces: the Tainet interface supports the direct access of each call group under IP mode and ; the two-line interface supports direct access and recording functions under the analog 2-line mode; the audio interface supports direct access and recording functions under analog audio mode. The voice recorder also provides the FTP server, which can download and manage voice-recording files stored via the local area network.

  关键词FPGA编解码;录音

keyword : FPGA; decoding ; audio recording

0 引言

0 Introduction

  通信技术迅速发展,带来了各行业日新月异的变化。各行各业对电话进行通话录音越来越普遍,如政府部门、安全系统、金融业或服务机构等部门因为各种原因需要进行在线录音监控。录音资料在一些服务领域被用来监控业务流程以帮助服务质量的提高。在铁路系统、电力系统、大型工厂等比较老迈的行业,录音电话、磁带录音机或磁带机监控系统仍然得到普遍使用[1]。采用传统的语音记录设备作为存储介质,存在存储介质体积大、查询录音文件困难、文件数据转移不易、保存寿命短、监控信息管理操作不便等问题,限制了其使用范围。本文设计的语音设备采用前沿电子技术,能够实现对专用网络的语音数据进行录音、监听。该设备是针对两个特殊专网之间的语音通信而设计的,考虑到专网的特殊性,语音数据不能从专网直接获取,因此将该设备桥接在两个专网之间,起到信令桥路的作用,网内设备都可以通过本设备对模拟话音、IP话音实现数字化记录功能,即对通话进行监控录音并将语音信息转换为方便存储的数字信息,以文件形式存储于存储介质上。

The use of traditional voice-recording devices as storage mediums, difficulties in accessing sound-recording documents, hard-to-file data transfer, short-life preservation, and poor management of surveillance information are increasingly common. Sound recordings are used in a number of service areas to help improve the quality of services. In relatively old industries such as railway systems, electricity systems, large factories, and so on, voice-recording telephones, tape recorders or tape-recording systems are still widely used [1]. The use of traditional voice-recording devices as storage mediums, the size of storage media, difficulties in accessing audio-recording documents, the difficulty of transferring document data, and the difficulty of managing information management limits their use.

1 解决方案

1 Solution

  本文设计的语音记录设备采用一个集成了Flash、DDR2、串口、两个以太网口的CPU模块作为中心控制器,采用一个DSP模块完成语音数据的编码、解码等功能,采用4路二线模块接入音频输入输出口,采用一个液晶显示模块来显示设备状态及用户操作的反馈结果,采用FPGA完成设备所有信令、数据、控制命令的交互[2]。其功能结构如图1所示。

The voice recording device is designed to perform voice data coding, decoding, etc. with one DSP module, access to audio input export, use a liquid crystal display module to show the status of the device and feedback from user operations, and use the FPGA to complete all message, data, control command interactions of the device [2]. The functional structure is shown in Figure 1.

001.jpg

  (1)CPU模块功能与作用

(1) CPU module functions and roles

  CPU模块是设备的核心,完成设备内硬件单元模块的控制,完成两个专网之间的协议适配,起到信令网关的作用;同时完成录音文件系统管理、查询等功能。

The CPU module, which is the core of the equipment, completes the control of the hardware module in the equipment, completes the fit-out of the protocol between the two networks and acts as a beacon gateway, while also completing the recording document system management, queries, etc.

  (2)DSP模块

(2) DSP module

  DSP模块完成话音数字处理、语音编解码、回声处理、静音识别等功能。

The DSP module completes voice digital processing, voice decoding, echo processing, silent recognition, etc.

  (3)显示模块

(3) Display modules

  显示模块完成对设备状态及用户操作的反馈结果的显示。因操作系统启动时间稍长,接近1 min,在软件运行之前显示模块由FPGA控制,软件运行之后由CPU接管。

Displays the feedback that the module completes on the device's state and user's operation. Due to the operational system start-up time, the module is shown to be controlled by the FPGA before the software runs, and the CPU takes over after the software runs.

  该方案所设计的语音记录设备具有下述基本功能:

The voice-recording equipment designed by the programme has the following basic functions:

  (1)支持在IP通信方式下的各通话组的直通及录音功能;

(1) To support the direct and sound recording functions of each call group under IP mode of communication;

  (2)支持模拟二线方式下的直通及录音功能;

(2) Support direct and sound recording functions under analogue 2-line mode;

  (3)支持模拟音频方式下的直通及录音功能;

(3) Support direct access and sound recording functions under analogue audio;

  (4)话音记录仪提供FTP服务器,为电脑通过车内局域网对语音记录仪保存的语音文件进行下载和管理。

(4) The Voice Recorder provides the FTP server for the download and management of voice-recorded voice-recording files for computers via the in-car local area network (LAN).

2 数据处理

2 Data Processing

  设备内部的所有数据通道由FPGA数据总线提供,FPGA对外提供两个与以太网口对接的MAC口以及所有的模拟接口模块的信号收发,与CPU模块之间采用一个以太网接口进行数据交互,与DSP信号处理单元采用MCBSP高速串口进行数据交互[3]。

All data channels within the equipment are provided by the FPGA data bus, FPGA provides external signal reception and reception of two MAC portals with the Ethernet interface and all analog interface modules, data interaction with the CPU module using a cytanet interface and data interaction with the DSP signal processing unit using the MCBSP high-speed serial ports [3].

  2.1 CPU与FPGA之间ETH接口

2.1 ETH interface between CPU and FPGA

  CPU与FPGA之间ETH接口主要实现以下功能:

The ETH interface between CPU and FPGA primarily achieves the following functions:

  (1)接收来自网络的IP语音包;

(1) Receiving IP packages from the network;

  (2)接收CPU发往DSP信号处理单元的解码码流;

(2) Receive the decoding flow of the CPU to the DSP signal processing unit;

  (3)接收CPU接收DSP信号处理单元解码后的码流及模拟接口处理后的码流;

(3) Receive the flow of the code following the decoding of the DSP signal processing unit by the CPU and the processing of the simulation interface;

  (4)响应FTP请求;

(4) Respond to the FTP request;

  (5)检测模拟接口模块是否接收到信号并判断其类型。

(5) Test whether the analog interface module receives the signal and determines its type.

  2.2 DSP信号处理单元与FPGA之间的接口

2.2 Interface between the DSP signal processing module and the FPGA

  DSP信号处理单元与FPGA之间的接口主要实现以下功能:

The interface between the DSP signal processing module and the FPGA primarily achieves the following functions:

  (1)接收CPU发来的待解码数据;

(1) Receive the pending coded data from the CPU;

  (2)返回CPU解码后的码流;

(ii) Return to the CPU decoded stream;

  (3)接收模拟接口模块的PCM信号及PTT或摘/挂机状态信号;

(iii) Receive PCM signals and PTT or extruding/recording state signals from the simulation interface module;

  (4)将DSP处理后的PCM信号及VAD检测结果发给CPU。

(4) Send the PCM signals processed by the DSP and the results of the VAD test to the CPU.

  DSP收发数据时序如图2所示。

The time series for the receipt and distribution of DSP data is shown in figure 2.

002.jpg

  收发帧信号参数如下:时钟为16 MHz;帧定位为  4 kHz;每帧4 096 bit(512 B);时钟上升沿采样,延迟  1 bit接收,帧定位高有效。

The parameters for the signal are as follows: clock 16 MHz; frame positioning & nbsp; 4 kHz; frame 4,096 bit (512 B); clock rising along sampling, delay & nbsp; 1 bit receiving, frame positioning is highly effective.

  DSP与FPGA之间每帧传送512时隙的内容,每32个时隙为一组,共16组,每组包括4个信令时隙和30个话音时隙,信令时隙用于交互某一通路话音的主被叫信息、编码方式、处理方式、录音指示等信息,话音时隙用于传输语音数据,每一个语音时隙可以和同组内的任意话音时隙进行合并使用。帧结构定义如表1所示。

Each frame between the DSP and the FPGA transmits a 512-hour gap, with a group of 16 groups, each consisting of 4 message slots and 30 voice slots, the message gap is used to interact with messages such as information, coding, processing, recording instructions, etc., the voice gap is used to transmit voice data, and each voice gap can be combined with any voice gap in the same group. The frame structure definition is shown in table 1.

004.jpg

  2.3 FPGA与模拟接口模块之间的接口

2.3 Interface between FPGA and the simulation interface module

  FPGA与模拟接口模块之间的接口主要实现以下功能:

The interface between the FPGA and the simulation interface module primarily achieves the following functions:

  (1)接收音频接口模块上音频对的PCM信号、双向PTT状态;

(1) Receive audio-to-sound PCM signals, two-way PTT status on the audio interface module;

  (2)接收二线接口模块上的PCM信号、摘/挂机状态;

(2) Receive PCM signals, extracts/tenders on the second-line interface module;

  (3)检测模块有无状态并报送给CPU;

(3) Test module state and report to CPU;

  (4)检测模块类型并报送给CPU。

(4) The test module type is reported to the CPU.

  2.4 话音编解码

2.4 Word decoding

  设备的话音编解码模块支持CVSD-PCM、PCM-G729、CVSD-G729、LPCM-PCM、LPCM-CVSD、LPCM-G729等编码方式的转换。语音编解码处理主要通过DSP来完成,DSP通过mcbsp口接收来自FPGA按规定格式送来的数据包,然后采用相应的算法完成数据编解码。

The device's voice decoding module supports the conversion of CVSD-PCM, PCM-G729, CVSD-G729, LPM-PCM, LPCM-CVSD, LPMCM-G729, etc. The voice decoding process is mainly done through the DSP, which receives, through the mcbsp, the packages sent by the FPGA in the prescribed format, and then completes the coding of the data using the corresponding algorithm.

3 FPGA程序模块化设计

3 FPGA Program Modular Design

  本设计中,FPGA程序采用模块化设计[4]。FPGA所完成的主要功能如下:

In this design, the FPGA program uses modular design [4]. The main functions performed by FPGA are as follows:

  (1)将各硬件模块组合在一起共同工作,完成各个数据接口适配。二线和音频接口需要FPGA对片外AD采样芯片进行控制,时序适配,完成对数据采集及输出。DSP接口模块实现与DSP和FPGA之间数据交换、信令交互。MAC模块完成以太网成解帧适配,采用查找表的方式完成语音包与信令包区分,语音通道号分配,话路号识别。

(1) Combining hardware modules together to complete the matching of data interfaces. Second-line and audio interfaces require FPGA to control the extra-AD sampling chip, time-sequencing, and complete data capture and output. The DSP interface module allows data exchange, message interaction with the DSP and FPGA. The MAC module completes the synthesizing frame matching with the Tainet, completes the separation of voice bags from mail packages using search forms, voice channel distributions, and call sign identification.

  (2)实现话音数据交换功能。FPGA将来自音频模块、MAC模块、DSP的语音数据进行内部交换处理,任意话路和通道的语音皆可交换至相应的出口和通道,从而实现对两个专网之间语音数据的监听、录音、回放等功能[5]。

(2) To achieve voice data exchange functions. The FPGA will exchange voice data internally from audio modules, MAC modules, and DSPs, and the corresponding exits and passages can be exchanged for voice by any route and channel, thus achieving the listening, recording, playback, etc. of voice data between the two exclusive networks [5].

4 实验及结果

4 experiments and results

  将本文所设计的语音记录设备跨接在两个专网中,搭建图3所示的实验环境进行实测以验证其功能及性能,测试结果如表2所示。

The voice-recording devices designed in this paper are connected to two networks, and the experimental environment shown in figure 3 is built to verify their functionality and performance. The results of the tests are shown in table 2.

003.jpg

  从表2可以看出,本文设计开发的语音记录设备可以桥接在两个专网之间工作,并有效地完成了专网之间语音通话的录音、监听等功能。从实际的使用效果上来看,该语音记录设备并未影响到两个专网各自的功能及应用,专网之间仍然可以互通电话及数据。采用4路音频接口对任意4路通话进行监听,并且可以随时切换监听话路。长时间录音、监听的效果达到了令人满意的程度。

As can be seen from table 2, the voice-recording device designed to be developed here can work between the two networks and effectively complete the recording, listening, etc. of voice conversations between the networks. In terms of actual usage, the voice-recording device does not affect the respective functions and applications of the two networks, and telephones and data are still interoperable between the networks.

5 结论

5 Conclusion

  本文所设计的语音记录设备实现了对多路电话信号检测、语音信号编解码,以及与通话相关信息的记录、保存与管理,管理内容主要包括用户管理、记录查询、记录备份、通话清单报表打印、操作日志以及远程操作等。在查询方面,系统实现了按通道、电话号码、时间、通话长度进行单一或组合的查询方式;在操作日志方面,系统实现了对操作系统用户的记录,保证了系统安全性;在远程操作中,实现了按通道、电话号码、时间、通话长度进行单一或组合的查询方式,并且实现了对通话语音的FTP下载。该语音记录设备的运行完全不影响原有的两个通信系统,并且人机界面友好、操作简单方便。

The voice-recording devices designed in this paper achieve multiple-circuit telephone signal detection, voice-sign decoding, and record-keeping and management of call-related information, managing mainly user management, record-checking, record-backing, call list report printing, operating logs, and remote operations. With regard to queries, the system achieves a single or combined query by channel, telephone number, time, and telephone length; with regard to operating logs, the system achieves a record of users of the operating system and ensures system security; remote operations achieves a single or combined search method by channel, telephone number, time, telephone length and FTP downloading of voice. The voice-recording device operates without prejudice to the two original communication systems and is user-friendly and simple to handle.

  参考文献

References

  [1] 徐君毅.单片机微型计算机原理及应用[M].上海:上海科技出版社,1988.

[1] Xu Junyi. Microcomputer Principles and Applications [M]. Shanghai: Shanghai Science and Technology Press, 1988.

  [2] 陈显治.现代通信技术[M].北京:电子工业出版社,2001.

[2] Chen Shengji. Modern communications technology [M]. Beijing: Electronics Industry Press, 2001.

  [3] 沈鑫剡.多媒体传输网络与VoIP系统设计[M].北京:人民邮电出版社,2005.

[3] Shenzhen. Multimedia Transfer Network and VoIP System Design [M]. Beijing: People's Post and Telecommunications Press, 2005.

  [4] 杨海钢,孙嘉斌,王慰.FPGA器件设计技术发展综述[J].电子与信息学报,2010,32(3):714-727.

[4] Yang Sea Steel, Sun Jiabin, Wang Kam. FPGA Design Technical Development Review [J]. Electronics and Informatics, 2010, 32(3): 714-727.

  [5] DAVID D, MICHAEL S. Verification methodology manual techniques for verifying HDL designs[M]. Winchester: Teamwork International, 2002.


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